Applying HCG to large capacitance

[Horshack]

DCG designs usually match their conversion gain to the capacitance they're using, applying LCG when they've enabled additional pixel capacitance and applying HCG when not.

Is there anything inherent to such designs and ADC operation that would preclude applying HCG to a large capacitance, specifically that would affect the expected increase in sensitivity from the HCG? It's understood that applying HCG will cause an overflow for the pixels receiving more light but would the the non-overflowed pixels converted by the ADC maintain their expected sensitivity improvements of HCG?

I'm asking in the context of potential dual-gain readout designs, where the pixel is attached to its extra capacitance (as if it were operating in LCG) but is read out at both LCG and HCG, merging the non-overflowed values of the HCG readout into the LCG readout, doing this merge either on-chip or delegating the merge to the ISP via two frames supplied by the sensor.

A secondary question is whether or not it's feasible to perform this dual readout non-destructively, where the first readout doesn't deplete the charge so that it's still available for the second readout/measurement by the ADC.

I'm currently investigating the DR improvement seen on the Panasonic S1 II camera , which appears to use the same partially-stacked IMX820 sensor in the Nikon Z6 III. Previous smaller Sony sensors have a "Clear HDR" function that defines a dual gain readout scheme but the documentation available doesn't specify whether it's dual analog gain or DCG or DCG+analog gain.

 

[Horshack]

With ISOCELL technology, ISOCELL image sensors have very high full well capacity. Pixels in the newest ISOCELL image sensor have up to 70,000 electrons, allowing the sensor to reach huge signal range. ... “To reduce noise, we perform two readouts: One with high gain to show the dark details and another with low gain to show the bright details. The two readouts are then merged in the sensor. Each read out has 10-bits. With the high conversion gain readout at 4x, it adds an additional 2-bits, producing 12-bit HDR image output. This technology is called Smart-ISO Pro also known as iDCG (intra-scene Dual Conversion Gain).”

Source: https://image-sensors-world.blogspot.com/2023/01/samsung-tech-blog-about-isocell-color.html

 

[Horshack]

Since existing sHDR and QHDR technologies are based on multiple exposure times, this inevitably leads to motion artifacts8 when adjusting exposure durations. Recognizing these constraints, SK hynix developed intra-scene dual conversion gain (iDCG)-HDR technology.

DCG is an innovative technology that can change the volume of the output signal by toggling the DCG capacitance on the floating node (FN), even if the same amount of light is received. By merging high conversion gain (HCG) and low conversion gain (LCG) images—both captured during a single exposure but with different brightness—iDCG-HDR expands the dynamic range to achieve HDR.

Source: https://www.eetimes.com/1409388-2/

 

[bclaff]

DCG designs usually match their conversion gain to the capacitance they're using, applying LCG when they've enabled additional pixel capacitance and applying HCG when not.

...

I'm a little confused by the terminology.

There is always conversion gain.

Dual Conversion Gain (DCG) sensors (eg. Aptina-like) have both LCG and HCG but you can only have one per read.

Having converted the charge to a voltage there's no reason you couldn't have Dual analog Gain Outputs (DGO) that that voltage goes into, one with a Low Gain (LG) and one with a High Gain (HG).
So, in my terms, that would be DGO with DCG.

Naturally you can one without the other: DCG or DGO as well as DCG with DGO

Regards

--
Bill ( Your trusted source for independent sensor data at PhotonsToPhotos )

 

[Horshack]

DCG designs usually match their conversion gain to the capacitance they're using, applying LCG when they've enabled additional pixel capacitance and applying HCG when not.

...

I'm a little confused by the terminology.

There is always conversion gain.

Dual Conversion Gain (DCG) sensors (eg. Aptina-like) have both LCG and HCG but you can only have one per read.

What is the source behind the assertion that you can only use one conversion gain to readout a given pixel's value per integration? The information I found from Samsung and SK hynix after I posed my question implies they have sensors that may do use both LCG and HCG to readout a value for a single integration. See those posts in this thread.

Having converted the charge to a voltage there's no reason you couldn't have Dual analog Gain Outputs (DGO) that that voltage goes into, one with a Low Gain (LG) and one with a High Gain (HG).
So, in my terms, that would be DGO with DCG.

Naturally you can one without the other: DCG or DGO as well as DCG with DGO

Regards

Understood. That's a slightly different scenario than the one I'm asking about.

 

[bclaff]

DCG designs usually match their conversion gain to the capacitance they're using, applying LCG when they've enabled additional pixel capacitance and applying HCG when not.

...

I'm a little confused by the terminology.

There is always conversion gain.

Dual Conversion Gain (DCG) sensors (eg. Aptina-like) have both LCG and HCG but you can only have one per read.

What is the source behind the assertion that you can only use one conversion gain to readout a given pixel's value per integration? The information I found from Samsung and SK hynix after I posed my question implies they have sensors that may do use both LCG and HCG to readout a value for a single integration. See those posts in this thread.

I'm, not an EE but I'm pretty sure you can only convert a charge to a voltage once, it's a destructive operation. (You discharge the capacitor to get the voltage).

I haven't looked but I think the source(s) you cite are being imprecise about the distinction I'm trying to make.

 

[Horshack]

DCG designs usually match their conversion gain to the capacitance they're using, applying LCG when they've enabled additional pixel capacitance and applying HCG when not.

...

I'm a little confused by the terminology.

There is always conversion gain.

Dual Conversion Gain (DCG) sensors (eg. Aptina-like) have both LCG and HCG but you can only have one per read.

What is the source behind the assertion that you can only use one conversion gain to readout a given pixel's value per integration? The information I found from Samsung and SK hynix after I posed my question implies they have sensors that may do use both LCG and HCG to readout a value for a single integration. See those posts in this thread.

I'm, not an EE but I'm pretty sure you can only convert a charge to a voltage once, it's a destructive operation. (You discharge the capacitor to get the voltage).

That was my understanding as well.

I haven't looked but I think the source(s) you cite are being imprecise about the distinction I'm trying to make.

Of the two sources I think the SK Hynix is rather explicit with its claim, with diagrams depicting single-exposure readouts at both LCG and HCG, and even including the DCG ratio applied. They also draw a distinction to their DAG technology, further disambiguating from the other DGO cases you outlined.

 

[bclaff]

DCG designs usually match their conversion gain to the capacitance they're using, applying LCG when they've enabled additional pixel capacitance and applying HCG when not.

...

I'm a little confused by the terminology.

There is always conversion gain.

Dual Conversion Gain (DCG) sensors (eg. Aptina-like) have both LCG and HCG but you can only have one per read.

What is the source behind the assertion that you can only use one conversion gain to readout a given pixel's value per integration? The information I found from Samsung and SK hynix after I posed my question implies they have sensors that may do use both LCG and HCG to readout a value for a single integration. See those posts in this thread.

I'm, not an EE but I'm pretty sure you can only convert a charge to a voltage once, it's a destructive operation. (You discharge the capacitor to get the voltage).

That was my understanding as well.

I haven't looked but I think the source(s) you cite are being imprecise about the distinction I'm trying to make.

Of the two sources I think the SK Hynix is rather explicit with its claim, with diagrams depicting single-exposure readouts at both LCG and HCG, and even including the DCG ratio applied. They also draw a distinction to their DAG technology, further disambiguating from the other DGO cases you outlined.

OK. Still seems like a contradiction. AFAIK, the charge is stored in a single capacitor and the size of the capacitor determines conversion gain. You only get one conversion gain.

 

[Horshack]

DCG designs usually match their conversion gain to the capacitance they're using, applying LCG when they've enabled additional pixel capacitance and applying HCG when not.

...

I'm a little confused by the terminology.

There is always conversion gain.

Dual Conversion Gain (DCG) sensors (eg. Aptina-like) have both LCG and HCG but you can only have one per read.

What is the source behind the assertion that you can only use one conversion gain to readout a given pixel's value per integration? The information I found from Samsung and SK hynix after I posed my question implies they have sensors that may do use both LCG and HCG to readout a value for a single integration. See those posts in this thread.

I'm, not an EE but I'm pretty sure you can only convert a charge to a voltage once, it's a destructive operation. (You discharge the capacitor to get the voltage).

That was my understanding as well.

I haven't looked but I think the source(s) you cite are being imprecise about the distinction I'm trying to make.

Of the two sources I think the SK Hynix is rather explicit with its claim, with diagrams depicting single-exposure readouts at both LCG and HCG, and even including the DCG ratio applied. They also draw a distinction to their DAG technology, further disambiguating from the other DGO cases you outlined.

OK. Still seems like a contradiction. AFAIK, the charge is stored in a single capacitor and the size of the capacitor determines conversion gain. You only get one conversion gain.

Agree, which tells me they're doing something more than maybe just a single capacitance for an integration.

Here's another Samsung blurb I found that's even more explicit about using both conversion gains yet leaves out the details of how it's actually done. I'm searching for patents to find the details.

Before we take a look into the Smart ISO Pro, it’s key to first understand how image sensors work. Light that passes through the lens is captured by the image sensor, and this analog signal is converted to an electrical signal based on a specific ratio called “conversion gain.” Existing image sensors have a fixed conversion gain. This makes it challenging to consistently capture high-quality photos across different lighting environments.

If the conversion gain is too low when shooting in low light environments, details in dark areas can be lost since the small amount of color information cannot be converted into sufficient voltage. By contrast, if the conversion gain is too high in brighter environments, details in overly bright areas can be lost since the image sensor can’t take in all that extra color information.

Samsung developed Smart ISO technology for its image sensors to solve this problem. This solution equips each image sensor with two levels of conversion gain, high and low ISO mode, allowing the camera to select the optimal settings depending on the environment.

In low light environments, the image sensor selects high ISO mode to convert even a small amount of color information in darker areas to sufficiently large voltage with a high conversion gain. This enables users to capture bright and vivid images with less noise, even in low light environments.

In brighter environments, low ISO mode is selected to maximize the capacity of each individual pixel using a low conversion gain so that it can take in bright light well. This prevents oversaturation and enhances color reproduction in brighter parts of the shot.

What if there is a way to use both modes in a single photo? Won’t these photos express rich details in both light and dark areas? The technology that brings this idea to life is the Smart ISO Pro.

Smart ISO Pro is a new high dynamic range (HDR) technology that taps into the principles of Smart ISO. For each shot, the Smart ISO Pro first generates readouts in both high and low ISO modes and then combines the outcomes of the two together to create an HDR image. This enables the image sensor to bring out the details of darker areas, retain the natural color of brighter areas, and ultimately produce HDR images that are true-to-life.

Source: https://semiconductor.samsung.com/n...ures-hidden-beauty-through-glare-or-darkness/

 

[bclaff]

DCG designs usually match their conversion gain to the capacitance they're using, applying LCG when they've enabled additional pixel capacitance and applying HCG when not.

...

I'm a little confused by the terminology.

There is always conversion gain.

Dual Conversion Gain (DCG) sensors (eg. Aptina-like) have both LCG and HCG but you can only have one per read.

What is the source behind the assertion that you can only use one conversion gain to readout a given pixel's value per integration? The information I found from Samsung and SK hynix after I posed my question implies they have sensors that may do use both LCG and HCG to readout a value for a single integration. See those posts in this thread.

I'm, not an EE but I'm pretty sure you can only convert a charge to a voltage once, it's a destructive operation. (You discharge the capacitor to get the voltage).

That was my understanding as well.

I haven't looked but I think the source(s) you cite are being imprecise about the distinction I'm trying to make.

Of the two sources I think the SK Hynix is rather explicit with its claim, with diagrams depicting single-exposure readouts at both LCG and HCG, and even including the DCG ratio applied. They also draw a distinction to their DAG technology, further disambiguating from the other DGO cases you outlined.

OK. Still seems like a contradiction. AFAIK, the charge is stored in a single capacitor and the size of the capacitor determines conversion gain. You only get one conversion gain.

Agree, which tells me they're doing something more than maybe just a single capacitance for an integration.

...Light that passes through the lens is captured by the image sensor, and this analog signal is converted to an electrical signal based on a specific ratio called “conversion gain.” ...

I see imprecise language here. "This analog signal" could be in volts (after what I call conversion gain) and then what they call "conversion gain" (in quotes!) is simply downstream analog gain.

--

Bill ( Your trusted source for independent sensor data at PhotonsToPhotos )

 

[Horshack]

Found the patent for Samsung's "Smart ISO Pro". Based on my read of the relevant section, they first do two CDS-related resets (SP1 and SP2), followed by one continuous integration period split into two parts - the first begins with the pixel in HCG mode (SP3), is read out, then continues with the pixel in LCG mode (SP4), and then is read out. Haven't read to the point on how the two are combined.

Here's the description of SP1 - SP4 from the patent. I've cut out some of the CDS housekeeping:

A readout period may be divided into first to fourth sub-periods SP1 to SP4according to a pixel signal output from the pixel PX. According to the gain control signal CGS, the pixel PX may operate in an LCG mode during the first and fourth sub-periods SP1 and SP4, and the pixel PX may operate in an HCG mode during the second and third sub-periods SP2 and SP3. As described above, the pixel PX may have a dual conversion gain.

During the first sub-period SP1, a reset signal corresponding to a reset level of the pixel PX (for example, the voltage of the reset floating diffusion node FD) may be read, and because the pixel PX operates in the LCG mode in the first sub-period SP1, an LCG reset signal indicating the reset level in the LCG mode may be read.

..

During the second sub-period SP2, a reset signal corresponding to the reset level of the pixel PX may be read, and because the pixel PX operates in the HCG mode in the second sub-period SP2, the HCG reset signal indicating the reset level in the HCG mode may be read.

...

During the third sub-period SP3, the pixel PX may operate in the HCG mode, and an HCG image signal corresponding to a signal level of the pixel PX may be read. As the transfer control signal TS transitions to the active level, for example, logic high, charges generated by the photodiode PD may be transferred to and stored in the floating diffusion node FD. The driving transistor DX may output an image signal based on the voltage of the floating diffusion node FD according to the amount of charges transferred from the photodiode PD. Because the pixel PX operates in the HCG mode, the HCG image signal may be output as the pixel voltage VPIX and may be analog-to-digital converted.

During the fourth sub-period SP4, the pixel PX may operate in the LCG mode, and an LCG image signal corresponding to the signal level of the pixel PX may be read. As the gain control signal CGS transitions to the active level, such as logic high, the gain control transistor CGX may be turned on, and the pixel PX may be switched to the LCG mode. In this case, the coupling capacitance of the floating diffusion node FD may change again. In other words, the coupling capacitance of the floating diffusion node FD may be the same as that of the first sub-period SP1, and the offset voltage ΔVFD added to the voltage of the floating diffusion node FD during the second sub-period SP2 may be removed. As the transfer control signal TS transitions to the active level, e.g., logic high, the remaining charges generated in the photodiode PD (e.g., the remaining charges that are not transmitted to the floating diffusion node FD during the third sub-period SP3) may be transferred to and stored in the floating diffusion node FD. The voltage of the floating diffusion node FD may change according to a change in the conversion gain and an amount of charges additionally transferred to the photodiode PD during the fourth sub-period SP4, and the LCG image signal corresponding to the voltage of the floating diffusion node FD may be output as the pixel voltage VPIX and may be analog-to-digital converted.



Google patent link: https://patents.google.com/patent/US11716549B2/

 

[Horshack]

Here is the section on merging the LCG and HCG values:

The 170 b may generate the HCG pixel value and the LCG pixel value based on the counting code CCD received from the 140 b and the comparison signal SCP received from the 160. The first counter CB1 may generate lower bits of the HCG pixel value and the LCG pixel value. The second counter CB2 may generate upper bits of the HCG pixel value and the LCG pixel value. For example, when each of the HCG pixel value and the LCG pixel value includes n-bit data, the first counter CB1 may generate lower m-bit data (m is a positive integer smaller than n) and the second counter CB2 may generate upper (n-m)-bit data. Hereinafter, in FIG. 17 and the description thereof, counting values and summation values described in connection with configurations of the first counter CB1, for example, the latch LAT, the first memory MEM1, and the second memory MEM2, may mean the lower n-bit data of the corresponding value among the LCG reset value RSTL, the HCG reset value RSTH, the HCG signal value SIGH, the LCG signal value SIGL, the HCG pixel value PXDH, and the LCG pixel value PXDL, and counting values and summation values described in connection with configurations of the second counter CB2, for example, the ripple counter RCNT, the third memory MEM3, and the fourth memory MEM4, may mean the upper (n-m)-bit data of the corresponding value among the LCG reset value RSTL, the HCG reset value RSTH, the HCG signal value SIGH, the LCG signal value SIGL, the HCG pixel value PXDH, and the LCG pixel value PXD.

 

[circa2000]

Your proposal looks a bit like sCMOS sensors from Fairchild Imaging and qCMOS from Hamamatsu Photonics:

https://fairchildimaging.com/scmos-sensors

https://www.hamamatsu.com/eu/en/product/cameras/qcmos-cameras.html

There are rumors that Black Magic cameras use Fairchild sensors. You might want to measure their performance.

 

[Eric Fossum]

but I'm pretty sure you can only convert a charge to a voltage once, it's a destructive operation. (You discharge the capacitor to get the voltage).

Not really true. The CCD floating gate amplifier senses charge non-destructively, and thus readout noise can be reduced by multiple reads of the same charge packet. You typically have to move the charge out of the way and sample an empty well in between each actual read to beat down (aka chop) 1/f noise.

This was invented by David Wen in the early 70's. It was then used by JPL (Janesick + Ford Aeronutronics) for low noise scientific readout and named "Skipper CCD." More recently Skipper has resurfaced for use in astrophysics for detecting both dark matter and habitable worlds in other star systems. But they use ~3000 resamples of each charge packet to achieve deep sub-electron read noise, so chip readout is very slow, and the CCD operates at cryogenic temp reduce dark current so that there are almost no dark electrons generated during integration and the long readout cycle.

This approach is challenged by quanta image sensors, SPADs to some degree, EMCCDs and other photon-counting sensor technologies.

Regarding DCG etc., see this recent forum post

EF

 

[bclaff]

Thanks !

 

[mosswings]

but I'm pretty sure you can only convert a charge to a voltage once, it's a destructive operation. (You discharge the capacitor to get the voltage).

Not really true. The CCD floating gate amplifier senses charge non-destructively, and thus readout noise can be reduced by multiple reads of the same charge packet. You typically have to move the charge out of the way and sample an empty well in between each actual read to beat down (aka chop) 1/f noise.

This was invented by David Wen in the early 70's. It was then used by JPL (Janesick + Ford Aeronutronics) for low noise scientific readout and named "Skipper CCD." More recently Skipper has resurfaced for use in astrophysics for detecting both dark matter and habitable worlds in other star systems. But they use ~3000 resamples of each charge packet to achieve deep sub-electron read noise, so chip readout is very slow, and the CCD operates at cryogenic temp reduce dark current so that there are almost no dark electrons generated during integration and the long readout cycle.

This approach is challenged by quanta image sensors, SPADs to some degree, EMCCDs and other photon-counting sensor technologies.

Regarding DCG etc., see this recent forum post

EF

Thanks as well. It's my understanding that what's responsible for the conversion gain is the well capacitance of the pixel. V=Q/C, small capacitance = large voltage (high conversion gain), large capacitance = small voltage (low conversion gain). The voltage is then sampled by a high-impedance amplifier which doesn't load down the node, hence the readout is non destructive. Then that sampled voltage is sent to the ADC.

Panasonic's comment on exceptionally high well-capacity is very suggestive here. This would allow you to basically gearshift at the ADC.

 

[Eric Fossum]

but I'm pretty sure you can only convert a charge to a voltage once, it's a destructive operation. (You discharge the capacitor to get the voltage).

Not really true. The CCD floating gate amplifier senses charge non-destructively, and thus readout noise can be reduced by multiple reads of the same charge packet. You typically have to move the charge out of the way and sample an empty well in between each actual read to beat down (aka chop) 1/f noise.

This was invented by David Wen in the early 70's. It was then used by JPL (Janesick + Ford Aeronutronics) for low noise scientific readout and named "Skipper CCD." More recently Skipper has resurfaced for use in astrophysics for detecting both dark matter and habitable worlds in other star systems. But they use ~3000 resamples of each charge packet to achieve deep sub-electron read noise, so chip readout is very slow, and the CCD operates at cryogenic temp reduce dark current so that there are almost no dark electrons generated during integration and the long readout cycle.

This approach is challenged by quanta image sensors, SPADs to some degree, EMCCDs and other photon-counting sensor technologies.

Regarding DCG etc., see this recent forum post

EF

Thanks as well. It's my understanding that what's responsible for the conversion gain is the well capacitance of the pixel. V=Q/C, small capacitance = large voltage (high conversion gain), large capacitance = small voltage (low conversion gain). The voltage is then sampled by a high-impedance amplifier which doesn't load down the node, hence the readout is non destructive. Then that sampled voltage is sent to the ADC.
Panasonic's comment on exceptionally high well-capacity is very suggestive here. This would allow you to basically gearshift at the ADC.

Mostly true. The capacitance is more complicated than that. Imagine you have two caps in series, and your inject some charge in the node between the caps. One cap is the well capacitance, and the other is the MOS cap where the voltage is sensed. Then, that voltage in turn is buffered by a MOSFET source follower (for example) to drive the ADC input, although there may be addition S/H caps after the follower. The source follower gate capacitance further reduces the sensed voltage. So, all in all, the conversion gain is smaller than for a typical floating diffusion readout so for a single read, the SNR that is limited by read noise is lower for the FG readout than the FD readout for a given signal charge, which is a disadvantage. You can get back SNR by multiple sampling (chopping the signal) to suppress 1/f noise at the cost of readout speed.

You could look at Wen's 1975 paper:

www.imagesensors.org/Past%20Workshops/Marvin%20White%20Collection/1975%20Papers/1975%202-03%20Wen.pdf

He didn't do a complete analysis but it will give you a better idea of the capacitances involved because of (his) structure.