A simple way to put Canon's sensors on top.

I see. Then he only backs up my point.
In fact, he doesn't. He would only back up your point *if* your assumption that the actual pixel FWC decreases with higher ISOs. It does not. Only the effective FWC decreases, and that is a function of the bit depth.
Not that point. The point that the DR is limited by light quantization. For example, if your maximum signal is 16 photons, you only have 4 stops of DR without downsampling.
If you are measuring DR over the area of a pixel and choosing a 100% NSR as the noise floor, but this is not a meaningful way to discuss the DR of the photo.
Yes it is. It matches the DXO definition for the screen DR as opposed to the print DR. Both are perfectly meaningful despite the stubborn insistence to the contrary of several members here. If the maximum signal is 1, the screen DR is zero, but the print DR is not.
DR per pixel using a 100% NSR for the noise floor is not a meaningful way to discuss the DR of a photo.
You are correct that a mere increase of the ADC depth would not increase the DR, but amplifying the ISO-100 signal would, as I described above.

Yes, the actual value of the read noise is not reduced, but it would be reduced in my step 3: "Reduce the signal back to the normal voltage by a passive filter at the ADC". I will let you sleep on it and if you still don't get my 4-step logic tomorrow, I will try to explain in more details.
Let's say the signal is 100 electrons, with a pixel read noise of 2 electrons, an ADC noise of 27 electrons, and all other sources of electronic noise are insignificant in comparison.

If we shoot at ISO 100, then the total read noise is sqrt (2² + 27²) = 27.1 electrons. If we push the photo 5 stops, the read noise is 27.1 x 32 = 866 electrons relative to an effective signal of 100 x 32 = 3200 electrons, for a relative pixel read noise of 866 / 3200 = 27%.

On the other hand, if we shot at ISO 3200, the effective pixel noise is 2 x 32 = 64 electrons, which then passes through the ADC for a total noise of sqrt (64² + 27²) = 69.5 electrons, resulting in a relative pixel read noise of 69.5 / 3200 = 2.2%. This is exactly what shooting at ISO 3200 is less noisy than shooting at ISO 100 and pushing five stops.

Now, let's discuss the DR per pixel using the read noise as the noise floor. Let's say each pixel has a FWC of 80000 electrons, a pixel noise of 2 electrons, an ADC noise of 27 electrons
There is no ADC noise. An ADC is a device capable of the specified resolution. Its noise cannot be even 1 bit, because it would reduce its resolution by 1 bit and make it not what it is presented to be. The noise enters before the ADC. However this point has no bearing on the consequent discussion or the final conclusion. It does not matter whatsoever where the noise originates, as long as it is after the amplifier, which is separate for each pixel and located inside the photocell.
For the same of argument, then, let's say what I was calling "pixel noise" is the electronic noise before amplification, and what I was calling "ADC noise" is the electronic noise after amplification.
, and, again, other sources of electronic noise are insignificant in comparison. This will result in a DR of log2 (80000 / 27.1) = 11.5 stops.

Let's say we had a bit depth so large that we could amplify the signal as much as we wanted without clipping. We'll use the same 5 stops for this example. Then the effective signal would be 80000 x 32 = 2560000 electrons and the effective pixel noise would be 2x32 = 64 electrons, giving a read noise per pixel of sqrt (64² + 27²) = 69.5 electrons, and thus a DR of log2 (2560000 / 69.5) = 15.2 stops.

Hey! That's what I was proposing in the OP!
Not exactly. Your proposal was that it was the resolution of the ADC that made a difference, but in fact it is the amplification. However, this technicality does not change the result.
Well, it is exactly what I was proposing in the OP. However, I think I see what you mean -- rather than encode the amplified signal with a greater bit depth, condense back down after its been amplified and encode with the least number of bits to maintain the DR (16 bits, in this example).
OK -- what am I doing wrong?
Nothing. You are simply following the 4-step logic from my post above that technically matches your OP proposal (with the above caveat). The result is correct with the assumption in my step #1 that the amplifier does not clip.
Thus, for this idea to work, we just need to have hardware that has enough resolution (is "resolution" the right term?) to process the amplified signal without clipping.
 
I see. Then he only backs up my point.
In fact, he doesn't. He would only back up your point *if* your assumption that the actual pixel FWC decreases with higher ISOs. It does not. Only the effective FWC decreases, and that is a function of the bit depth.
Not that point. The point that the DR is limited by light quantization. For example, if your maximum signal is 16 photons, you only have 4 stops of DR without downsampling.
If you are measuring DR over the area of a pixel and choosing a 100% NSR as the noise floor, but this is not a meaningful way to discuss the DR of the photo.
Yes it is. It matches the DXO definition for the screen DR as opposed to the print DR. Both are perfectly meaningful despite the stubborn insistence to the contrary of several members here. If the maximum signal is 1, the screen DR is zero, but the print DR is not.
DR per pixel using a 100% NSR for the noise floor is not a meaningful way to discuss the DR of a photo.
This is exactly what I called "stubborn insistence" ;)
You are correct that a mere increase of the ADC depth would not increase the DR, but amplifying the ISO-100 signal would, as I described above.

Yes, the actual value of the read noise is not reduced, but it would be reduced in my step 3: "Reduce the signal back to the normal voltage by a passive filter at the ADC". I will let you sleep on it and if you still don't get my 4-step logic tomorrow, I will try to explain in more details.
Let's say the signal is 100 electrons, with a pixel read noise of 2 electrons, an ADC noise of 27 electrons, and all other sources of electronic noise are insignificant in comparison.

If we shoot at ISO 100, then the total read noise is sqrt (2² + 27²) = 27.1 electrons. If we push the photo 5 stops, the read noise is 27.1 x 32 = 866 electrons relative to an effective signal of 100 x 32 = 3200 electrons, for a relative pixel read noise of 866 / 3200 = 27%.

On the other hand, if we shot at ISO 3200, the effective pixel noise is 2 x 32 = 64 electrons, which then passes through the ADC for a total noise of sqrt (64² + 27²) = 69.5 electrons, resulting in a relative pixel read noise of 69.5 / 3200 = 2.2%. This is exactly what shooting at ISO 3200 is less noisy than shooting at ISO 100 and pushing five stops.

Now, let's discuss the DR per pixel using the read noise as the noise floor. Let's say each pixel has a FWC of 80000 electrons, a pixel noise of 2 electrons, an ADC noise of 27 electrons
There is no ADC noise. An ADC is a device capable of the specified resolution. Its noise cannot be even 1 bit, because it would reduce its resolution by 1 bit and make it not what it is presented to be. The noise enters before the ADC. However this point has no bearing on the consequent discussion or the final conclusion. It does not matter whatsoever where the noise originates, as long as it is after the amplifier, which is separate for each pixel and located inside the photocell.
For the same of argument, then, let's say what I was calling "pixel noise" is the electronic noise before amplification, and what I was calling "ADC noise" is the electronic noise after amplification.
Yes, the same thing in the end. The only difference is that you proposed the higher number of bits in the ADC to be the reason for the DR increase while the actual reason is amplification and the increased number of bits in the ADC is only needed to capture the end result. For example, you could get a 14-bit DR using the existing 14-bit ADC, if you manage to amplify the signal about 6 times without clipping.
, and, again, other sources of electronic noise are insignificant in comparison. This will result in a DR of log2 (80000 / 27.1) = 11.5 stops.

Let's say we had a bit depth so large that we could amplify the signal as much as we wanted without clipping. We'll use the same 5 stops for this example. Then the effective signal would be 80000 x 32 = 2560000 electrons and the effective pixel noise would be 2x32 = 64 electrons, giving a read noise per pixel of sqrt (64² + 27²) = 69.5 electrons, and thus a DR of log2 (2560000 / 69.5) = 15.2 stops.

Hey! That's what I was proposing in the OP!
Not exactly. Your proposal was that it was the resolution of the ADC that made a difference, but in fact it is the amplification. However, this technicality does not change the result.
Well, it is exactly what I was proposing in the OP. However, I think I see what you mean -- rather than encode the amplified signal with a greater bit depth, condense back down after its been amplified and encode with the least number of bits to maintain the DR (16 bits, in this example).
See above. The effect is similar to high voltage power lines. The voltage is increased ("amplified") at the power plant and then reduced back before going into your house. The reason this is done is exactly to avoid losses of electricity in transit.
OK -- what am I doing wrong?
Nothing. You are simply following the 4-step logic from my post above that technically matches your OP proposal (with the above caveat). The result is correct with the assumption in my step #1 that the amplifier does not clip.
Thus, for this idea to work, we just need to have hardware that has enough resolution (is "resolution" the right term?) to process the amplified signal without clipping.
I believe this is called "resolution", if you measure it in bits, but the same is called "SNR" if you measure it in dB (decibels). 16 bits or stops correspond to 90 dB. I believe this is not a problem with modern electronics in general, but I am not sure specifically regarding sensor amplifiers. However, the amplifiers in the Sony sensors do seem to handle 14 bits.

Besides the resolution, you also would need to increase the output voltage of the amplifiers and therefore supply a higher voltage to the sensor. I am not sure if this is a problem. Perhaps more heat?
 
Great Bustard wrote: Now, let's discuss the DR per pixel using the read noise as the noise floor. Let's say each pixel has a FWC of 80000 electrons, a pixel noise of 2 electrons, an ADC noise of 27 electrons, and, again, other sources of electronic noise are insignificant in comparison. This will result in a DR of log2 (80000 / 27.1) = 11.5 stops.

Let's say we had a bit depth so large that we could amplify the signal as much as we wanted without clipping. ...

Hey! That's what I was proposing in the OP! OK -- what am I doing wrong?
Well, what you are talking about is an increase in Amp/ADC DR, not bith depth which has nothing to do with it.

But if I understand your point correclty, your assumption of increased DR is equivalent to assuming that Canon could come up with an Amp/ADC subsystem with lower read noise - which is quite possible and hopefully they will in the near future, but that's not possible with their technology today.

Look at it this way: Assuming our simplified model holds (not a given, since I assume a single amp stage for the graph above while I believe there are two kicking in at different ISOs), the 6D receives the signal through a black box with 'DR' of 15.3 stops [log2(76606/1.9)], the sensor, and processes it through one with DR of 11.5 stops [log2(13235/4.6)], the Amp/ADC

The latter obviously clips the wings of the former, so different gains are used to squeeze the more useful portion of the sensor DR into the Amp/ADC's smaller DR window.

Jack

PS Your NSR simile works.
 
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It is hard to read your English, but it sounds like you agree that the well capacity is lower at higher ISO. And therefore the wells do fill up at any ISO. In other words, an overexposure at ISO 3200 will saturate the sensor, not just the ADC. You seem to disagree earlier. Those here who think that you can overexpose at ISO 3200 by 5 stops without clipping the sensor and then just use a wider ADC to get more DR are wrong.
...the ISO setting on the camera has squat to do with the FWC of the pixels. For example, if a pixel can absorb 80000 photons, then it can do so at any ISO setting, since the ISO setting merely applies a gain to that signal *after* the fact.

Indeed, it doesn't make any sense at all that the ISO setting would affect the pixels' ability to absorb light -- it merely affects what is done with that light after it turns photons into electrons.
I understand what you are saying. If the sensor and amplifier were separate consecutive units, you would be correct. I am not a sensor engineer and I may be wrong. If you provide a link to a convincing evidence then I would learn and benefit from this forum. But until then I maintain that the amplification is done by applying a higher voltage to the sensor thus reducing the well capacity. To be clear, I understand that there is an amplifier after the sensor, but it is not where the ISO amplification is done. Prove me wrong by a clear reference. I don't mind to be wrong, my goal here is to learn, not to satisfy my ego.
From Ron's site
http://www.ronbigelow.com/articles/noise-1/noise-1.htm

"....the photons reach the sensor and excite electrons.... These excited electrons are freed from the molecules to which they are attached. When a voltage is applied,
A higher voltage is applied for higher ISO.
these free electrons create a current and flow into a capacitor. This creates a charge on the capacitor. The charge is then measured to create a voltage measurement. This voltage measurement is processed by the camera to determine how much light reached the pixel during exposure"

"...After the freed electrons flow into a capacitor and the voltage of the capacitor is measured, the voltage is amplified before any further processing is performed"

".....The way that a digital camera increases the ISO is to apply a greater amount of amplification to the voltages that come from the pixels' capacitors"
The higher voltage applied to the sensor (see above), the higher the output voltage is. The amplification happens in the sensor. Again, I am just playing devil's advocate here, but this site is popular, not technical, and does not prove me wrong.
So if the increase in voltage associated with ISO is applied to the signal from the capacitor, and not the individual pixels prior to capacitor storage, is actual Full Well Capacity not affected by ISO?
The jury is still out.
Press correspondent, what you are talking about is avalanche amplification. A single photon can indirectly dislodge multiple electrons. However this process is very noisy and for that reason is not used in image sensors.
Actually, it is. The type of sensor is made by two companies, I think and used for astronomy, see here:


As you say, photo-multiplication is a stochastic process, so doesn't actually improve the SNR. However, if the amplification is large enough, single photons can be counted which means effectively zero read noise and absolute linearity. More or less a perfect sensor, except if you count individual photons, they have to be arriving pretty slowly.
 
Well, what you are talking about is an increase in Amp/ADC DR, not bith depth which has nothing to do with it.
+1
But if I understand your point correclty, your assumption of increased DR is equivalent to assuming that Canon could come up with an Amp/ADC subsystem with lower read noise - which is quite possible and hopefully they will in the near future, but that's not possible with their technology today.
+1
 
At higher ISO settings, Canon sensors are as good as the best of them. So, if Canon were to offer an optional ISOless interface, increase the bit depth of the capture files to 20 bits, and have the cameras shoot permanently at ISO 3200 in the ISOless shooting mode, they'd match or beat Sony's sensors in terms of noise and DR.

By making the ISOless UI optional, it would still allow those who find the current noise and DR levels to be "good enough" and prefer setting the ISO themselves to continue as before without any bother.
Wouldn't increasing the bit depth to 20 bits drive the price up to NASA project level?
Dunno. Is 20 bit architecture that much more expensive than 14 bit? I suspect not. The main issue, methinks, is if 20 bit architecture would slow down the frame rate (of course, it would require greater storage and processing times, but...).
An off chip 20 bit ADC is tricky. There is a conflict between ADC sampling rate and noise and you can't have so many parallel (and thus slower) channels off-chip. Pentax used to use a 22bit ADC on its CCD cameras, made by a now defunct startup called Nucore. It gave pretty good results, but not 22 bits DR.
 
Well, what you are talking about is an increase in Amp/ADC DR, not bith depth which has nothing to do with it.
+1
But if I understand your point correclty, your assumption of increased DR is equivalent to assuming that Canon could come up with an Amp/ADC subsystem with lower read noise - which is quite possible and hopefully they will in the near future, but that's not possible with their technology today.
+1
Well, I learned a lot and appreciate all the input!
 
At higher ISO settings, Canon sensors are as good as the best of them. So, if Canon were to offer an optional ISOless interface, increase the bit depth of the capture files to 20 bits, and have the cameras shoot permanently at ISO 3200 in the ISOless shooting mode, they'd match or beat Sony's sensors in terms of noise and DR.

By making the ISOless UI optional, it would still allow those who find the current noise and DR levels to be "good enough" and prefer setting the ISO themselves to continue as before without any bother.
Haven't red the thread.. but at ISO 3200 the saturation capacity will be 32x lower than at ISO 100, so max SNR will be about the same as on a 5.6x crop compact. More bits (off-chip) won't help, but a noiseless on-chip ADC (which Canon unfortunately doesn't have) could probably do the trick.
 

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