Fab plants are very expensive to build and run (this is not because accountants do not understand what they are doing - they really are). So that cost is amortized over the number of viable sensors created.
Thank you for that information. This might come as a shock to you, but it was something that I already knew. The point I was making, which seems to have gone over your head, is that
if the chip is fabricated on an old line, for which the capital investment has already largely been amortised, then the effective cost becomes much smaller, since what is happening is that an otherwise redundant or underused plant is being used to generate revenue. That is all on the positive side of the account, so long as the company accountants can be persuaded to see it that way.
Each wafer has defects. This means some of the resulting chips are garbage. If you average 3 defects per wafer, and the wafer makes 20 chips, you get a yield of 17 useable chips. Larger sensors mean fewer per wafer, so not only are you making fewer right off the bat, but defects cost more too. For example, if that wafer made 12 smaller chips, the three defects mean you get 9 useable - so the waste is greater. Now your cost to run the fab plant gets divided by a much smaller number of useable sensors. In my example, the ratio of sensor size is 5:3 (20 compared to 12), but the yield is 9:17 - quite different. Another way of putting it is that you lose 15% of the smaller chips, but the same wafer defect rate would have a loss of 25% of larger chips.
Yet another shock for you - I know all of that, too. So a mature semiconductor plant has a defect rate of between 0.01 and 0.03 defects per square centimetre. Lets call it 0.02 for this discussion. That means that we might expect on average a 4x3cm chip (12 sq cm) to have a rate of 0.24 or a defect every fourth chip. But a defect doesn't necessarily mean the loss of a chip. Kodak commercial grade image sensors allow up to
80 defective pixels per chip, so actually defects in the pixel array will not generally be important at that defect rate. Defects in the peripheral circuitry might cost an entire chip, so lets assume that the peripheral circuitry is 2.5 sq cm, that is a loss of about 0.1 or one in 10 chips. A 8" wafer holds 20 FF chips, which means each wafer will yield 18 usable chips. (actually close to your 17, but still a reasonable return). So then the question is - how much is a wafer to process. The cost of a raw silicon 8" wafer is about $50. Labour productivity is about 25 mask layers per person day for a small semiconductor line (big ones are more efficient) so that is about a person day per wafer. If a person day costs $100, then we have a cost per wafer of about $150, add another $30 for dopant and other material costs - and we get the cost of a FF sensor chip
without plant amortisation as about $10. Thus the
bulk of the cost is amortised plant costs, so - as I said and you disputed - if the chip is made on obsolescent plant, for which the investment has already been paid off, it can be made very cheaply. Actually you see this effect all over the semiconductor industry, with old parts being produced at fractions of their original price (if they are still in demand).
So that increase in sensor size costs a much larger than expected increase in cost.
Now I have just made up numbers, but the principle is correct. Increase the size of a chip and you add cost quickly.
You do not understand the cost of producing larger sensors at all.
You do not understand the cost of producing larger sensors at all.
OK, illuminate the discussion with your account of the costs of larger sensors.
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Bob
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Bob
