Then we should have 1GP sensors by now.
Doppler9000 wrote:
Thomas A Anderson wrote:
Doppler9000 wrote:
Thomas A Anderson wrote:
archerscreek wrote:
yayatosorus wrote:
According to DP Review , the R3 will indeed feature a 24 megapixel sensor.
I see many continue to hold out hope, reasoning that it’s possible Cable and other R3 shooters submitting images simply don’t want to shoot anything higher than 24 MP. The flaw with that line of reasoning, however, is that Cable is also shooting with two R5 cameras in his gear bag and is submitting images with higher resolutions than the R3 ones. If the R3 had a higher resolution potential, it would have shown up.
It’s time to admit it and get over your disappointment. The R3 is a 24MP camera.
It also stands to reason that when they're working on a new technology, in this case a BSI CMOS, that they wouldn't instantly have the highest pixel density available. They had to come up with the architecture, the manufacturing tooling and processes, and then prove that it could be mass produced. The only way to do that is to do it. And a proof of concept is great, but making money off of the result is even better. So they get it all figured out on a lower MP sensor, start cranking out sensors, work through all the bugs at a low rate initial production, and slowly ramp up. Then, once all those details are worked out they can work on cramming twice as many pixels in (again, not only BSI but also DPAF, which means they're already doing 48MP on a 24MP output sensor) and get a decent yield.
Hard to believe Canon’s 2021 chip fab capabilities are that far behind Samsung’s from 7 years ago.
How long has Canon had BSI CMOS fabs? How does Canon's CMOS chip architecture transfer to a BSI layout? Did they have to entirely reinvent their technology? Because the issue here is that this is new to Canon, not to the world. Canon had to figure out their own way of doing it....assuming they didn't steal or purchase the tech from someone else.
Presumably they would have licensed pieces of the required IP instead of being more than 7 years behind?
For example, Canon got CMOS engineering advice from Mitsubishi when it set up its sensor fab operation.
Samsung sold cameras in 2014 that had 28 MP APS-C BSI CMOS sensors.
And those 28MP sensors were Dual Pixel with two photodiodes at each pixel location? And while BSI CMOS may define the architecture of a chip to a certain point, there are still architectural details that differ from sensor to sensor.
2014.
2008.
That's the year Sony announced development of their first BSI CMOS sensor. In 2010 they announced a 16.41MP BSI CMOS phone sensor that started shipping January 2011. It was a 1/2.8" sensor with an area of around 20 mm2 (that's rounding up). A FF sensor is 864 mm2, which is 44.2 X the area. So my question is why hasn't anyone, even Sony, made a 725MP FF sensor? The technology existed in 2010 to do it, which means anything less than that should be considered falling behind Sony's abilities.
At this density, a full frame sensor (~63 MP) would be the highest resolution FF photographic camera on the market today.
And who's to say they could have upscaled that density to a FF size while still getting enough yield to put it in an affordable camera? One can't simply assume that's the case.
I didn’t assume anything - just pointing out the implied pixel density and that it seems unlikely that 2014 Samsung had significantly denser sensor production capability than Canon’s maximum 2021 capability. Seven years is a pretty long time to lag behind someone in this sort of technological space. The facts point to an answer that isn’t that 24 MP is Canon’s current BSI chip density max, in my view.
You are free to disagree, but saying that Samsung perhaps could’t have produced a FF 63 MP BSI chip in 2014 due to potential yield issues rather misses the point of the benchmark.
I would think the resolution vs speed trade offs in the R3 reflect Canon’s view of the needs of the target photographers, more so than technical fabrication constraints.
But the technical fabrication restraints result from the architecture that allows increased read speed on the chip. This is why I said BSI CMOS doesn't tell the whole story: if it did then every sensor using that technology would run at the same speed, but integrating amplifiers, onboard memory, onboard buffer, or whatever other vertical integration/stacking that may be necessary also plays a role. And that's not to mention materials used in the sensor circuitry itself, the processes required to make that type of manufacturing feasible, and changes to physical architecture that could say....increase speed, increase efficiency, increase dynamic range. There are so many details of the pixel itself, the transport of data, amplification, etc. etc. that go into these things besides simply cramming more and more pixels into the same space.
