Are bigger pixels less noisy?

Started 4 months ago | Discussions thread
Eric Fossum
Eric Fossum Senior Member • Posts: 1,516
Re: Are bigger pixels less noisy?
3

bobn2 wrote:

I had a huge great argument here with Eric on this topic some years ago. Anyhow, this is what I was saying, reworded a bit, in deference to Eric.

Thanks for deference, although to be honest I have no recollection. Hope it was a tie.

When you're looking for dependencies, you end up making some assumptions, which are likely not realistic, but if the reality carries some correlation with the assumptions, maybe you've captured 'weak dependency'.

So, let's assume that all pixels are designed the same (of course, they aren't) and we produce small pixels just by scaling large pixels down proportionately. This means that every feature of the pixel gets smaller (and also, another discussion, that it's fill factor stays the same). The input referred read noise depends on the electronic noise from the pixel source follower and downstream and the conversion gain of the pixel. In turn the conversion gain is inversely proportional to the capacitance of the SF gate and floating diffusion. If these are scaled down the capacitance goes down, the CG goes up and the read noise is reduced.

The limiting noise in SFs these days is often 1/f noise.  1/f noise goes like 1/(gate area)^x where x is about 1 and x depends on a lot of factors it seems. So you get improved CG and worse output-referred voltage noise as the SF gate area shrinks.  CG depends on other parasitic capacitances too so CG improvement is not proportional to SF-gate-area shrink so it could go the other way -> smaller SF gates gives more noise.

I understand you are trying to simplify things here but in the simplification you might get the right answer for the wrong reasons.

Some of you might also be wondering where 1/f noise comes from.  That also depends on the transistor design. In the realm of where we are in QIS-land, it is not traps and RTN, it seems to be mobility fluctuation, which is pretty basic, and the noise is pretty much the same for MOSFETs, buried channel MOSFETs, and JFETs as we are finding out. We also found a way around this! One of my better ideas it seems, which was just accepted for a conference, so stay tuned. I will share when I can. Without the new idea, the best devices have about 0.12e- rms read noise.  That, compared to 0.20e- rms, helps a lot with BER when you are doing photon-counting.

Now, as said before, pixels aren't in reality designed like that, but we can see why there might be a correlation. For instance:

Companies that have multiple fab lines will tend to use the smaller process nodes for smaller pixel sensors, so the features in those pixel designs will be smaller.

If the sensor is being able to cope with a particular saturation exposure (e.g. to allow use with 100 ISO) then at that exposure the smaller pixel collects fewer photoelectrons, and can be designed with a lower saturation capacity. That means smaller capacitance in the SF gate/floating diffusion.

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